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SANTA CLARA, Calif.--(BUSINESS WIRE)--June 25, 2001--Real Intent Inc. (Santa Clara, Calif.), an EDA company that offers formal register transfer level (RTL) functional verification products, announced today its membership in the Cadence Design Systems, Inc. Connections® Program.

The joint effort benefits customers by reinforcing and strengthening the interoperability between Cadence hardware description language (HDL) simulators and synthesis tools and Real Intent's formal verification products.

Dr. Narain, President and CEO of Real Intent, noted, ``We are focused on improving verification productivity by adding powerful, easy-to-use advanced formal verification tools to simulation-based verification flows. By joining the Connections Program we have access to Cadence® NC-Sim Verilog, VHDL-based simulation, and BuildGates® synthesis tools to verify smooth working design flows for our common customers.''

Verix is Real Intent's pioneering intent-driven formal RTL verification system that ensures a design is free from a large class of errors early in the design cycle prior to simulation and synthesis. It speeds the design of high-end semiconductors and systems-on-chip by verifying that the design implements the designer's intent, at the RTL.

``Bringing interfacing solutions to customers is what Connections is about,'' said Pat Dutrow, director of the Connections Program at Cadence. ``The interoperability between Real Intent's Verix and Cadence simulator and synthesis tools will provide greater customer satisfaction for both companies.''

Verix is available now, and runs on the Unix OS from Sun Microsystems (Nasdaq: SUNW) and Hewlett-Packard Company (NYSE: HWP - ) and the popular Linux operating system from Red Hat (Nasdaq: RHAT).

About Cadence Connections Program

Cadence provides Connections members access to software and application notes, allowing tight tool interoperability with third-party software tools. The program provides tool integration in the areas of analog/mixed-signal, integrated circuit, board design, and logic verification. More information about the Connections Program may be obtained at www.connectionsprogram.com/.

About Real Intent

Real Intent was founded in July 1998 and is privately held. Real Intent pioneered Intent-Driven Verification (IDV), a revolutionary approach for verifying complex ICs, and is recognized as a technology leader in formal RTL verification. Real Intent's vision and commitment has attracted some of the brightest technologists, including those responsible for the pioneering formal work at the University of California (Berkeley) the University of Colorado (Boulder), Carnegie Mellon University (Pittsburgh, PA), the University of Illinois (Urbana) and Stanford University (California).

Real Intent is located at 3910 Freedom Circle, Suite 102A, Santa Clara, CA 95054, tel.: (408) 982-5444, fax: (408) 982-5443, email: info@realintent.com, web: http://www.realintent.com.

Notes to editors:
Acronyms
EDA:     Electronic Design Automation
HDL:     Hardware Description Language
IC:      Integrated Circuit
IDV:     Intent Driven Verification
VHDL:    VHSIC (Very High-Speed IC) HDL
RTL:     Register Transfer Level

    Real Intent and Verix are trademarks of Real Intent, Inc. All
other tradenames and trademarks are the property of their respective
owners.

    Keywords -- ASIC, EDA,semiconductor, computer hardware, computers,
networking, software, telecom,

     Real Intent
     Stephen R. Pollock, 408/982-5412
     pollock@realintent.com
       or
     ValleyPR for Real Intent
     Georgia Marszalek, 650/345-7477
     georgia@valleypr.com